 PIXEL OPTOELECTRONIC DEVICE WITH IMPROVED CONTRAST AND LUMINANCE
专利摘要:
The invention relates to an optoelectronic device (10) comprising a substrate (12) comprising first and second opposing faces (14, 16) and elements (18) of lateral electrical insulation extending into the substrate and delimiting first portions. semiconductors or conductors (20) electrically insulated. The optoelectronic device comprises, for each first portion, a set (D) of light emitting diodes electrically connected to the first portion. The optoelectronic device comprises an electrode layer (36) covering all the light emitting diodes, a protective layer (40) covering the electrode layer, and walls (42) extending in the protective layer and delimiting second electrodes. portions surrounding or facing sets (D) of light-emitting diodes. The walls contain at least one material included in the group consisting of air, a metal, a semiconductor material, a metal alloy, a partially transparent material and a core of at least partially transparent material covered with an opaque or reflecting layer. 公开号:FR3053530A1 申请号:FR1656170 申请日:2016-06-30 公开日:2018-01-05 发明作者:Tiphaine Dupont；Sylvia SCARINGELLA；Erwan Dornel；Philippe Gibert；Philippe Gilet；Xavier Hugon；Fabienne Goutaudier 申请人:Aledia； IPC主号:
专利说明:
Field The present application relates to an optoelectronic device with light-emitting diodes, in particular with light-emitting diodes made of inorganic materials, for example a display screen or an image projection device. Presentation of the prior art There are optoelectronic devices, in particular display screens or projection devices, comprising light-emitting diodes based on semiconductor materials comprising a stack of semiconductor layers mainly comprising at least one group III element and one group V element, called thereafter compound III-V, in particular gallium nitride (GaN), gallium and indium nitride (GalnN) and gallium and aluminum nitride (GaAlN). A pixel of an image corresponds to the unitary element of the image displayed by a display screen or projected by a projection device. When the optoelectronic device is a monochrome image display screen or a monochrome image projection device, it generally comprises a single light source, or display pixel, for displaying each B15067 pixel of the image. When the optoelectronic device is a color image display screen or a color image projection device, it generally comprises, for the display of each image pixel, at least three emission and / or regulation components. of light intensity, also called display subpixels, which each emit light radiation in substantially one color (for example, red, green and blue). The superposition of the radiations emitted by these three display sub-pixels provides the observer with the colored sensation corresponding to the pixel of the displayed image. In this case, the display screen or projection device display pixel is the assembly formed by the three display subpixels used for the display of an image pixel. It is known to produce optoelectronic devices with light-emitting diodes formed from three-dimensional semiconductor elements, for example microwires, nanowires, conical elements or frustoconical elements. The light-emitting diodes are then said to be three-dimensional. Patent application PCT / FR2015 / 053754 not yet published describes optoelectronic devices with three-dimensional light-emitting diodes, in particular display screens or projection devices, comprising display pixels. The use of three-dimensional light-emitting diodes makes it possible to increase the maximum light intensity that can be emitted by each display sub-pixel compared to a light-emitting diode obtained by stacking plane semiconductor layers. Many constraints must be taken into account when designing an optoelectronic device with display pixels, namely: the luminance, defined as the quotient of the light intensity of the light surface of the optoelectronic device by the area of this surface projected on the perpendicular to the direction of observation, must be as high as possible; B15067 the contrast, defined as the ratio of light intensity between an extreme white point and an extreme black point, must be as high as possible; and the heat produced by the light emitting diodes must be efficiently dissipated. It can be difficult to satisfy all of these constraints when the display pixels include three-dimensional light emitting diodes. summary An object of an embodiment is to overcome all or part of the drawbacks of optoelectronic devices with three-dimensional light-emitting diodes comprising display pixels described above, in particular display screens or projection devices. Another object of an embodiment is to increase the luminance of the optoelectronic device. Another object of an embodiment is to increase the contrast of the optoelectronic device. Another object of an embodiment is to increase the evacuation of the heat produced by the light sources of the optoelectronic device. Thus, an embodiment provides an optoelectronic device comprising a substrate comprising first and second opposite faces, lateral electrical insulation elements extending from the first face to the second face and delimiting in the substrate first semiconductor or conductive portions. electrically isolated from each other, the optoelectronic device further comprising, for each first portion, a set of light-emitting diodes resting on the first face and electrically connected to the first portion, the optoelectronic device further comprising a layer of conductive and at least partially transparent electrode covering all light-emitting diodes, a protective layer containing a first dielectric material and at least B15067 partially transparent at least in the emission wavelength range of light emitting diodes and possible phosphors present in the protective layer covering the electrode layer, and walls extending at least partly in the layer of protection and delimiting in the protection layer the second portions surrounding or opposite sets of light-emitting diodes, the walls containing at least one second material different from the first material and included in the group comprising air, a metal , a semiconductor material, a metal alloy, a material that is partially transparent at least in the emission wavelength range of the light-emitting diodes and any phosphors and a core of a material that is at least partially transparent at least in the length range emission wave of light-emitting diodes and possible phosphors covered with an opaque layer or r reflective at least in the emission wavelength range of light emitting diodes and possible phosphors. According to one embodiment, each light-emitting diode comprises at least one wired, conical or frustoconical semiconductor element, integrating or covered at the top and / or at least on part of its lateral faces by a shell comprising at least one active layer adapted to provide the majority of the light emitting diode radiation. According to one embodiment, the protective layer surrounds each light-emitting diode. According to one embodiment, the protective layer does not surround the light-emitting diodes. According to one embodiment, the walls extend at least over the entire thickness of the protective layer. According to one embodiment, at least one of the walls comprises a solid block extending by an opening filled with air. According to one embodiment, the protective layer comprises phosphors. B15067 According to one embodiment, the protective layer comprises a monocrystalline crystal of a phosphor. According to one embodiment, the optoelectronic device further comprises a plate of a material at least partially transparent at least in the emission wavelength range of light emitting diodes and any phosphors covering the protective layer and mechanically connected to the substrate. According to one embodiment, the plate is separated from the protective layer by an air or partial vacuum film. According to one embodiment, the optoelectronic device further comprises additional walls whose height is greater than the thickness of the protective layer in contact with the plate and resting on the substrate. According to one embodiment, the device furthermore, an electrode conducting layer around the optoelectronic diodes covering it, the light-emitting layer of each assembly. According to one embodiment, the substrate is made of silicon, germanium, silicon carbide, a compound IIIV, such as GaN or GaAs, or ZnO. According to one embodiment, each semiconductor element is mainly in a III-V compound, in particular gallium nitride, or in a II-VI compound. According to one embodiment, the optoelectronic device is a display screen or a projection device. According to one embodiment, the optoelectronic device further comprises, on the encapsulation layer, filters adapted to absorb and / or reflect at least partially the radiation emitted by the light-emitting diodes. According to one embodiment, the optoelectronic device further comprises, on the plate, filters adapted to absorb and / or reflect at least in part the radiation emitted by the light-emitting diodes. B15067 According to one embodiment, the walls correspond to portions of the substrate. One embodiment also provides a method of manufacturing an optoelectronic device comprising the following steps: a) forming, in a substrate comprising first and second opposite faces, lateral electrical insulation elements extending from the first face to the second face and delimiting in the substrate first semiconductor or conductive portions electrically insulated from each other ; b) forming, for each first portion, a set of light-emitting diodes resting on the first face and electrically connected to the first portion; c) forming, for each first portion, a conductive and at least partially transparent electrode layer covering all the light-emitting diodes; d) forming a protective layer of a first dielectric material and at least partially transparent at least in the emission wavelength range of the light-emitting diodes and of possible phosphors present in the protective layer covering the layer of electrode and walls extending at least partly in the protective layer and delimiting in the protective layer second portions surrounding or opposite sets of light-emitting diodes, the walls containing at least one second material different from the first material and included in the group comprising air, a metal, a metal alloy, a partially transparent material at least in the emission wavelength range of light-emitting diodes and possible phosphors and a core of a material less partially transparent at least in the emission wavelength range of light emitting diodes and possible phosphors covered with an opaque or reflective layer at least in the B15067 emission wavelength range of light-emitting diodes and possible phosphors. According to one embodiment, each light-emitting diode comprises at least one wired, conical or frustoconical semiconductor element, integrating or covered at the top and / or at least on part of its lateral faces by a shell comprising at least one active layer adapted to provide the majority of the light emitting diode radiation. According to one embodiment, the protective layer surrounds each light-emitting diode. According to one embodiment, the protective layer does not surround the light-emitting diodes. According to one embodiment, the walls extend at least over the entire thickness of the protective layer. According to one embodiment, at least one of the walls comprises a solid block extending by an opening filled with air. According to one embodiment, the protective layer comprises phosphors. According to one embodiment, the protective layer comprises a monocrystalline crystal of a phosphor. According to one embodiment, the method further comprises the mechanical bonding to the substrate of a plate of a material at least partially transparent at least in the range of emission wavelength of light emitting diodes and possible phosphors and covering the protective layer. According to one embodiment, the plate is separated from the protective layer by an air or partial vacuum film. According to one embodiment, the method further comprises the formation of additional walls whose height is greater than the thickness of the protective layer in contact with the plate and resting on the substrate. According to one embodiment, the method further comprises the formation of a conductive layer covering the layer B15067 electrode around the light emitting diodes of each set. According to one embodiment, the substrate is made of silicon, germanium, silicon carbide, a compound IIIV, such as GaN or GaAs, or ZnO. According to one embodiment, each semiconductor element is mainly in a III-V compound, in particular gallium nitride, or in a II-VI compound. According to one embodiment, the optoelectronic device is a display screen or a projection device. According to one embodiment, the method further comprises the formation on the encapsulation layer of filters adapted to absorb and / or reflect at least in part the radiation emitted by the light-emitting diodes. According to one embodiment, the method further comprises the formation on the plate of filters adapted to absorb and / or reflect at least in part the radiation emitted by the light-emitting diodes. According to one embodiment, the walls correspond to portions of the substrate. Brief description of the drawings These characteristics and advantages, as well as others, will be explained in detail in the following description of particular embodiments made without implied limitation in relation to the attached figures, among which: Figures IA, IB and IC are respectively a top view, a front view with section and a bottom view, partial and schematic, of an embodiment of an optoelectronic device with light emitting diodes; FIGS. 2A to 2C, 3A and 3B, 4A to 4E and 5A to 5D illustrate the structures obtained in successive stages of embodiments of a method of manufacturing the optoelectronic device shown in FIGS. 1A to 1C; B15067 Figures 6 to 25 are views similar to Figure IB of other embodiments of an optoelectronic device with light emitting diodes; and FIGS. 26A to 26D illustrate the structures obtained in successive stages of an embodiment of a method for manufacturing the optoelectronic device shown in FIG. 23. detailed description For the sake of clarity, the same elements have been designated by the same references to the different figures and, moreover, the various figures are not drawn to scale. In addition, only the elements useful for understanding the embodiments have been represented and are described. In particular, the device for controlling an optoelectronic device with light-emitting diodes is known to those skilled in the art and is not described below. In the following description, unless indicated otherwise, the terms substantially, approximately and in the order of mean to within 10%. The embodiments described below relate to optoelectronic devices, in particular display screens or projection devices, comprising light-emitting diodes formed from three-dimensional semiconductor elements, for example microwires, nanowires, conical elements or frustoconical elements. In the following description, embodiments are described for light-emitting diodes formed from microfibers or nanowires. However, these embodiments can be implemented for three-dimensional elements other than microfils or nanowires, for example three-dimensional elements in the shape of a pyramid. In addition, in the following description, embodiments are described for light-emitting diodes each comprising a shell which at least partially surrounds the microfil or nanowire. However, these embodiments can be implemented for light-emitting diodes B15067 for which the active area is located in the height or at the top of the microfil or nanowire. The term microfil or nanowire designates a three-dimensional structure of elongated shape in a preferred direction of which at least two dimensions, called minor dimensions, are between 5 nm and 5 pm, preferably between 50 nm and 2.5 pm, the third dimension, called major dimension, being at least equal to 1 time, preferably at least 5 times and even more preferably at least 10 times, the largest of the minor dimensions. In certain embodiments, the minor dimensions may be less than or equal to approximately 1 μm, preferably between 100 nm and 1 μm, more preferably between 100 nm and 300 nm. In certain embodiments, the height of each microfil or nanowire can be greater than or equal to 500 nm, preferably between 1 μm and 50 μm. In the following description, the term yarn is used to mean microfil or nanowire. Preferably, the mean line of the wire which passes through the barycenters of the straight sections, in planes perpendicular to the preferred direction of the wire, is substantially rectilinear and is hereinafter called the axis of the wire. According to one embodiment, an optoelectronic device is provided, in particular a display screen or a projection device, comprising an integrated circuit comprising a substrate, for example a conductive or semiconductor substrate, divided into portions of substrate electrically insulated each others and comprising, for each display sub-pixel, sets of light-emitting diodes formed on the front face of the substrate. Each set of light emitting diodes comprises a light emitting diode or several light emitting diodes connected in parallel. By connection of light-emitting diodes in parallel, it is meant that the anodes of light-emitting diodes are connected together and that the cathodes of light-emitting diodes are connected B15067 together. Each set of elementary light-emitting diodes is equivalent to a global light-emitting diode comprising an anode and a cathode. The optoelectronic device further comprises means for increasing the luminance and / or the contrast. FIGS. 1A to 1C represent an embodiment of an optoelectronic device 10, in particular a display screen or a projection device, comprising: a conductive or semiconductor substrate 12 comprising a lower face 14 and an opposite upper face 16, the upper face 16 preferably being planar at least at the level of the light-emitting diode assemblies; - Elements 18 of electrical insulation which extend in the substrate 12 between the faces 14 and 16 and which divide the substrate 12 into conductive or semiconductor portions; - Electrically conductive pads 22 in contact with the lower face 14, each portion 20 being in contact with one of the conductive pads 22; - Germination pads 24 promoting the growth of wires, each germination pad 24 being in contact with the face 16 on one of the conductive or semiconductor portions 20, these pads 24 can be replaced by a germination layer covering the active surface of each pixel; - Son 26, each wire 26 being in contact with one of the germination pads 24, each wire 26 comprising a lower portion 28, in contact with the germination pad 24 and an upper portion 30, extending the lower portion 28; an insulating layer 32 extending on the face 16 of the substrate 12 and extending on the lateral flanks of the lower portion 28 of each wire 26; - A shell 34 comprising a stack of semiconductor layers covering the upper portion 30 of each wire 26; an electrically conductive layer 36 at least partially transparent in the wavelength range B15067 for emitting elementary light-emitting diodes forming an electrode covering each shell 34, and extending over the insulating layer 32 between the wires 26; an electrically conductive layer 38 covering the electrode layer 36 between the wires 26 but not extending over the wires 26 or else only over part of the lateral flanks of the wires 26, the conductive layer 38 also being at contact of one of the semiconductor portions 20 through an opening 39 provided in the electrode layer 36 and in the insulating layer 32, or, as a variant, the conductive layer 38 being, moreover, electrically connected to one of the semiconductor portions 20, via the electrode layer 36 through the opening 39 then provided only in the insulating layer 32; an encapsulation layer 40, also called a protective layer, at least partially transparent in the emission wavelength range of the elementary light-emitting diodes and covering the entire structure and, in particular, completely covering each wire 26, the encapsulation layer 40 not being, as a variant, not present; and walls 42 extending in the encapsulation layer 40 and surrounding each set D of wires 26 resting on each portion 20, the walls being made of a material different from the encapsulation layer 40. According to one embodiment, an insulating layer, also called a passivation layer, can also be interposed between the encapsulation layer 40 and the conductive layer 38, between the encapsulation layer 40 and the parts of the electrode layer. 36 not covered by the conductive layer 38 and between the walls 42 and the conductive layer 38. Each wire 26 and the associated shell 34 constitute an elementary light-emitting diode. Elementary light-emitting diodes located on the same portion B15067 semiconductor 20 form a set D of light emitting diodes. Each set D therefore comprises several elementary light-emitting diodes connected in parallel. The number of elementary light-emitting diodes per set D can vary from 1 to several tens of thousands, typically from 25 to 1000. The number of elementary light-emitting diodes per set D can vary from one set to another. The electrode layer 36 and the encapsulation layer 40 are at least partially transparent in the emission wavelength range of the elementary light emitting diodes. Each display sub-pixel Pix of the optoelectronic device 10 comprises one of the conductive or semiconductor portions 20 and the set D of light-emitting diodes resting on this portion 20. In FIGS. 1A and 1B, the separation between the Pix display subpixels by dashed lines 44. According to one embodiment, the surface occupied by each Pix subpixel in top view can vary from 3 μm by 3 pim to approximately 100,000 pim ^ and typically from 25 pure / to 6,400 pure /. Each elementary light-emitting diode is formed of a shell covering at least partially a wire. The developed surface of the active layers of the elementary light-emitting diodes of a set D is greater than the surface of the display subpixel comprising this set D. The maximum light intensity that can be supplied by the display sub-pixel can therefore be greater to that of a display sub-pixel produced with a two-dimensional inorganic light-emitting diode technology. According to one embodiment, the substrate 12 corresponds to a monolithic semiconductor substrate. The semiconductor substrate 12 is, for example, a substrate of silicon, germanium, or a III-V compound such as GaAs. Preferably, the substrate 12 is a monocrystalline silicon substrate. Preferably, the semiconductor substrate 12 is doped so as to lower the electrical resistivity to a B15067 resistivity close to that of metals, preferably less than a few mohm.cm. The substrate 12 is preferably a highly doped semiconductor substrate with a concentration of dopants of between 5 * 10 ^ 6 atoms / cm ^ and 2 * 10 ^ 0 atoms / cm ^, preferably between 1 * 10 ^^ atoms / cm ^ and 2 * 10 ^ 0 atoms / cm ^, for example 5 * 10 ^ atoms / cm-J At the start of the manufacturing process of the optoelectronic device, the substrate 12 has a thickness of between 275 µm and 1500 µm, preferably 725 µm . Once the optoelectronic device is produced, after a thinning step described in more detail below, the substrate 12 has a thickness of between 0 μm and 100 μm. In the case of a silicon substrate 12, examples of P-type dopants are boron (B) or indium (In) and examples of N-type dopants are phosphorus (P), arsenic ( As), or antimony (Sb). Preferably, the substrate 12 is doped with type N with phosphorus. The face 14 of the silicon substrate 12 can be a face (100) or (111). The germination pads 24, also called germination islands, are made of a material promoting the growth of the wires. 26. A treatment may be provided to protect the lateral flanks of the germination pads and the surface of the parts of the substrate not covered by the germination pads to prevent the growth of the wires on the lateral flanks of the germination pads and on the surface of the parts. of the substrate not covered by the germination pads. The treatment can comprise the formation of a dielectric region on the lateral flanks of the germination pads and extending over and / or in the substrate and connecting, for each pair of pads, one of the pads of the pair to the another stud of the pair, the wires not growing on the dielectric region. Said dielectric region can extend beyond the germination pads 24. As a variant, the germination pads 24 can be replaced, for each sub-pixel, by a germination layer covering the face 16 of the substrate 12, thus delimiting the active surface of each pixel and corresponding to a strictly smaller surface B15067 to that of the pixel, each germination layer not extending above the isolation trenches 18. A dielectric region can then be formed above the germination layer to prevent the growth of wires in the locations not wanted. By way of example, the material composing the germination pads 24 may be a transition metal from column IV, V or VI of the periodic table of the elements or a nitride, a carbide or a boride from a transition metal from the column IV, V or VI of the periodic table of the elements or a combination of these compounds. By way of example, the germination pads 24 can be made of aluminum nitride (AIN), boron (B), boron nitride (BN), titanium (Ti), titanium nitride (TiN), tantalum (Ta), tantalum nitride (TaN), hafnium (Hf), hafnium nitride (HfN), niobium (Nb), niobium nitride (NbN), zirconium (Zr), zirconium borate (ZrB2), zirconium nitride (ZrN), silicon carbide (SiC), nitride and tantalum carbide (TaCN), magnesium nitride in the form Mg x Ny, where x is approximately equal to 3 and y is approximately equal to 2, for example magnesium nitride in the form Mg3N2 or gallium and magnesium nitride (MgGaN), in tungsten (W), in tungsten nitride (WN) or in a combination of those -this. Alternatively, the germination pads may be replaced by a germination structure comprising germination pads covered by a second germination layer or comprising a first germination layer covered by the second germination layer. By way of example, the second germination layer may be a transition metal from column IV, V or VI of the periodic table of the elements or a nitride, a carbide or a boride from a transition metal from column IV, V or VI of the periodic table of the elements or a combination of these compounds. The second germination layer can be produced from the first germination layer. For example, a second nitrided germination layer can be produced by epitaxy from a layer in B15067 aluminum nitride produced by epitaxy. A process for manufacturing such a germination structure is described in French patent application FR1656008 filed on 06/28/16. The insulating layer 32 can be made of a dielectric material, for example of silicon oxide (SiC> 2), of silicon nitride (Si x Ny, where x is approximately equal to 3 and y is approximately equal to 4, for example S13N4), in silicon oxynitride (SiO x Ny where x can be approximately equal to 1/2 and y can be approximately equal to 1, for example S12ON2), aluminum oxide (AI2O3), hafnium oxide (HfO2) or diamond. By way of example, the thickness of the insulating layer 32 is between 5 nm and 1 μm, for example equal to around 30 nm. The wires 26 are, at least in part, formed from at least one semiconductor material. The semiconductor material can be silicon, germanium, silicon carbide, a III-V compound, a II-VI compound or a combination of these compounds. The wires 26 can be, at least in part, formed from semiconductor materials mainly comprising a III-V compound, for example III-N compounds. Examples of group III elements include gallium (Ga), indium (In) or aluminum (Al). Examples of III-N compounds are GaN, AIN, InN, InGaN, AlGaN or AlInGaN. Other elements of group V can also be used, for example, phosphorus or arsenic. Generally, the elements in compound III-V can be combined with different molar fractions. The wires 26 can be, at least in part, formed from semiconductor materials mainly comprising a compound II-VI. Examples of elements of group II include elements of group IIA, in particular beryllium (Be) and magnesium (Mg) and elements of group IIB, in particular zinc (Zn) and cadmium (Cd). Examples of group VI elements include elements of group VIA, including oxygen (O) B15067 and tellurium (Te). Examples of compounds II-VI are ZnO, ZnMgO, CdZnO or CdZnMgO. Generally, the elements in compound II-VI can be combined with different molar fractions. The wires 26 may include a dopant. For example, for III-V compounds, the dopant can be chosen from the group comprising a P type dopant from group II, for example, magnesium (Mg), zinc (Zn), cadmium (Cd ) or mercury (Hg), a group IV type P dopant, for example carbon (C) or a group IV type N dopant, for example silicon (Si), germanium (Ge), selenium (Se), sulfur (S), terbium (Tb) or tin (Sn). The cross section of the wires 26 can have different shapes, such as, for example, an oval, circular or polygonal shape, in particular triangular, rectangular, square or hexagonal. By way of example, in FIG. 3A, the wires are shown with a hexagonal cross section. Thus, we understand that, when we mention here the diameter in a cross section of a wire or a layer deposited on this wire, it is a quantity associated with the surface of the structure referred to in this cross section , corresponding, for example, to the diameter of the disc having the same surface as the cross section of the wire. The average diameter of each wire 26 can be between 50 nm and 5 μm. The height of each wire 26 can be between 250 nm and 50 μm. Each wire 26 may have a semiconductor structure elongated along an axis substantially perpendicular to the face 16. Each wire 26 may have a generally cylindrical shape. The axes of two adjacent wires 26 can be spaced 0.5 µm to 10 µm and preferably 1.5 µm to 5 µm. For example, the wires 26 can be regularly distributed, in particular according to a hexagonal network. By way of example, the lower portion 28 of each wire 26 may mainly consist of the compound III-N, for example gallium nitride, doped with the same type as the substrate 12, for example of the N type, for example with silicon , or doped of the opposite type with respect to the substrate 12. The portion B15067 lower 28 extends over a height which can be between 100 nm and 25 μm. For example, the upper portion 30 of each wire 26 is at least partially made of a III-N compound, for example GaN. The upper portion 30 can be N-type doped, possibly less heavily doped than the lower portion 28 or not be intentionally doped. The upper portion 30 extends over a height which can be between 100 nm and 25 μm. The shell 34 may comprise a stack of several layers comprising in particular: an active layer covering the upper portion 30 of the associated wire 26; - An intermediate layer of conductivity type opposite to the lower portion 28 and covering the active layer; and a bonding layer covering the intermediate layer and covered by the electrode 36. The active layer is the layer from which the majority of the radiation supplied by the elementary light-emitting diode is emitted. According to one example, the active layer may include means for confining the carriers of electric charge, such as multiple quantum wells. It is, for example, made up of alternating layers of GaN and InGaN having respective thicknesses of 5 to 20 nm (for example 8 nm) and from 1 to 15 nm (for example 2.5 nm). The GaN layers can be doped, for example of the N or P type. According to another example, the active layer can comprise a single layer of InGaN, for example of thickness greater than 10 nm. The intermediate layer, for example P-type doped, can correspond to a semiconductor layer or to a stack of semiconductor layers and allows the formation of a PN or PIN junction, the active layer being between the P-type intermediate layer and the upper portion 30 of type N of the PN or PIN junction. B15067 The bonding layer can correspond to a semiconductor layer or to a stack of semiconductor layers and allows the formation of an ohmic contact between the intermediate layer and the electrode 36. For example, the bonding layer can be highly doped. strongly of the type opposite to the lower portion 28 of each wire 26, to degenerate the semiconductor layer or layers, for example doped P-type at a concentration greater than or equal to 10 ^ 0 atoms / cm ^. The stack of semiconductor layers may comprise an electron blocking layer formed of a ternary alloy, for example made of qallium aluminum nitride (AlGaN) or indium aluminum nitride (AlInN) in contact with the active layer and the intermediate layer, to ensure good distribution of the electrical carriers in the active layer. The electrode 36 is adapted to polarize the active layer of each wire 26 and to let through the electromagnetic radiation emitted by the light-emitting diodes. The material forming the electrode 36 can be a material at least partially transparent in the range of emission wavelength of the elementary light-emitting diodes and electrically conductive such as indium tin oxide (or ITO, acronym anqlais for Indium Tin Oxide), zinc oxide doped with aluminum, qallium and / or indium, or qraphene. By way of example, the electrode layer 36 has a thickness of between 5 nm and 200 nm, preferably between 20 nm and 100 nm. The conductive layer 38 preferably corresponds to a metallic layer, for example aluminum, copper, gold, ruthenium or arqent, or to a stack of metallic layers, for example titanium-aluminum, silicon-aluminum, in titanenickel-arqent, copper or zinc. By way of example, the conductive layer 38 has a thickness of between 20 nm and 3000 nm, preferably between 400 nm and 800 nm. The conductive layer 38 is only present between the wires and does not cover the emissive surface of the latter. The conductive layer 38 makes it possible to B15067 reduce resistive losses during current flow. It also has a role of reflector to return to the outside the rays emitted by the light-emitting diodes in the direction of the substrate. The encapsulation layer 40 is made of an insulating material at least partially transparent in the emission wavelength range of the elementary light-emitting diodes. The minimum thickness of the encapsulation layer 40 is between 250 nm and 50 μm so that the encapsulation layer 40 preferably completely covers the electrode layer 36 at the top of the arrays D of light emitting diodes. The layer 40 can completely fill the space between the wires. As a variant, the layer 40 can follow the shape of the wires. The encapsulation layer 40 can be made of an at least partially transparent inorganic material. By way of example, the inorganic material is chosen from the group comprising silicon oxides of the SiO x type where x is a real number between 1 and 2 or SiOyN z where y and z are real numbers between 0 and 1 and aluminum oxides, for example AI2O3. The encapsulation layer 40 can be made of an organic material at least partially transparent. By way of example, the encapsulation layer 40 is a silicone polymer, an epoxy polymer, an acrylic polymer or a polycarbonate. The electrical insulation elements 18 may comprise trenches extending over the entire thickness of the substrate 12 and filled with an insulating material, for example an oxide, in particular silicon oxide, or an insulating polymer. As a variant, the walls of each trench 18 are covered with an insulating layer, the rest of the trench being filled with a semiconductor or conductive material, for example polycrystalline silicon. According to another variant, the electrical insulation elements 18 comprise doped regions of a type of polarity opposite to the substrate 12 and extending over the entire depth of the substrate 12. By way of example, each trench 18 B15067 has a width greater than 1 μm, which varies in particular from 1 μm to 10 μm, for example around 2 μm. In FIGS. 3B and 3C, the electrical insulation elements 18 comprise, for each portion 20 of the substrate 12, a single trench which delimits the portion 20 of the substrate 12. By way of example, pairs of adjacent trenches can be provided to electrically isolate each portion 20, the distance between the two trenches 18 of a pair of adjacent trenches 18 being for example greater than 5 μm, for example approximately 6 μm. In general, trenches so thin can only be made with a limited depth, between ten micrometers and a hundred micrometers depending on the engraving and insulation technique chosen. It is therefore advisable to thin the substrate 12 until the electrical insulation elements 18 are flush. To do this, a handle made of a rigid material can be temporarily or permanently fixed to the encapsulation layer 40. In the case where the handle is permanently fixed to the encapsulation layer 40, the handle is made of a material at least partially transparent in the emission wavelength range of elementary light emitting diodes. It may be glass, in particular a borosilicate glass, for example glass known by the name pyrex, or sapphire. After thinning the rear face 14 of the substrate can be treated, then if the bonding is temporary, the handle can be peeled off. Each conductive pad 22 can correspond to a layer or to a stack of layers covering the face 14. As an alternative, an insulating layer can partially cover the face 14, each conductive pad 22 being in contact with the semiconductor portion 20 associated through openings etched in this insulating layer. As shown in FIG. 1B, each wall 42 extends from the conductive layer 38 over the entire thickness H of the encapsulation layer 40. As a variant, the height B15067 of each wall 42 may be strictly less than or greater than the thickness H of the encapsulation layer 40. In the present embodiment, the height of each wall 42 may be greater than or equal to the height of the wires 26. From preferably, the width of each wall 42 is less than or equal to the smallest distance between two elementary light-emitting diodes of adjacent sets D. The width L of each wall 42 can be between 0.5 μm and 12 μm. The presence of the walls 42 makes it possible, advantageously, to increase the contrast of the optoelectronic device 10. In addition, they make it possible to increase the luminance of the optoelectronic device 10, in particular in a direction of observation perpendicular to the upper face 16 of the substrate 12. According to one embodiment, each wall 42 is composed of a block of a solid material or of several solid materials 43. According to one embodiment, each wall 42 comprises reflective walls. According to one embodiment, the walls 42 are made of a material which is a good thermal conductor, for example of a metal or a metal alloy, for example of Cu, Ag, CuAg, CuSnAg, CuNi, CuNiAu, Al, ZnAl, or AlCu. The walls 42 then facilitate, in addition, the evacuation towards the substrate 12 of the heat produced during the operation of the light-emitting diodes. As a variant, each wall 42 may include a core, for example a metallic core, covered with a reflective layer. According to one embodiment, each wall 42 comprises opaque walls. By way of example, each wall 42 can comprise a core covered with a layer of resin colored in black. This resin is preferably adapted to absorb electromagnetic radiation over the spectral range including the emission spectrum of elementary light-emitting diodes and that of phosphors, when they are present. According to another embodiment, each wall 42 is made of a resin partially transparent to visible light. B15067 According to one embodiment, the walls 42 are not made entirely of resin colored in black. According to one embodiment, each wall 42 comprises a reflective wall, for example of polymer with particles of TiOq · In FIG. 1B, the walls 42 are shown with side walls which are substantially parallel and substantially perpendicular to the upper face 16 of the substrate 12. As a variant, the side walls of each wall 42 can be inclined relative to the upper face 16 of the substrate 12 so as to approach each other while moving away from the substrate 12. This makes it possible to increase the luminance of the optoelectronic device 10, in particular in a direction of observation perpendicular to the upper face 16 of the substrate 12. The optoelectronic device 10 can also comprise photoluminescent materials, also called phosphors, in the encapsulation layer 40 or on the encapsulation layer 40. The phosphors are suitable, when they are excited by the light emitted by the light emitting diodes, emitting light at a wavelength different from the wavelength of light emitted by light emitting diodes. According to one embodiment, phosphors are notably distributed between the wires 26. Preferably, when the phosphors are embedded in the encapsulation layer 40, the mean diameter of the phosphors is chosen so that at least a portion of the phosphors are distributed between the wires 26. Preferably, the diameter of the phosphors is between 1 nm and 1000 nm. The photoluminescent material can be an aluminate, a silicate, a nitride, a fluoride or a sulfide, emitting light at a wavelength in the range from 400 to 700 nm under a light excitation whose wavelength is in the range from 300 to 500 nm, or preferably from 380 to 480 nm. B15067 Preferably, the photoluminescent material is an aluminate, in particular an aluminum and yttrium garnet according to the following formula (1): (Y 3 _ x r! X ) (Al 5 _ y R2 y ) O 12 (D where Rl and R ^ are independently chosen from elements comprising rare earths, alkaline earths and transition metals and x and y vary each and independently from 0 to 1.5, preferably from 0 to 1. Preferably, R - * - and R ^ are independently chosen from the group comprising cerium, samarium, gadolinium, silicon, barium, terbium, strontium, chromium, praseodymium and gallium. By way of example of nitrides absorbing and emitting light in the desired wavelength ranges, there may be mentioned: CaAlSiN 3 : Eu, (Ca, Sr) AlSiN 3 : Eu, Ca 2 SÎ5N 8 : Eu or ( Ca, Sr) If 5 N 8 : Eu. As an example of fluorides absorbing and emitting light in the desired wavelength ranges, mention may be made of fluorides of formula K 2 MF 8 : Mn (where M can be Si, Ge, Sn or Ti). By way of example of sulfides absorbing and emitting light in the desired wavelength ranges, there may be mentioned: CaS: Eu, SrCa: Eu, (Sr, Ca) S: Eu and SrGa 2 S 4 : Eu . By way of example of an aluminate absorbing and emitting light in the desired wavelength ranges, there may be mentioned: Y 3 Al 5 O 12 : Ce, (Y, Gd) 3 A1 5 O 12 : Ce, Tb 3 Al 5 O 12 , (Y, Tb) 3 A1 5 O 12 , Lu 3 A1 5 O 12 : Ce and Y 3 (Al, Ga) 5 O 12 . By way of example of silicates absorbing and emitting light in the desired wavelength ranges, there may be mentioned: (Sr, Ba) 2 SiO 4 : Eu, Sr 2 SiO 4 : Eu, Ba 2 SiO 4 : Eu, Ca 2 SiO 4 : Eu, Ca 3 SiC> 5: Eu and Sr 3 SiC> 5: Eu. According to one embodiment, the phosphors can comprise semiconductor materials adapted to provide quantum confinement in at least one direction of space, such as quantum dots or quantum wells. B15067 When the encapsulation layer 40 comprises phosphors, different phosphors can be provided according to the sets D of light-emitting diodes. FIG. 6 represents another embodiment of an optoelectronic device 52 comprising all of the elements of the optoelectronic device 10 and further comprising, for each display sub-pixel Pix, an optical filter 53 on the layer of encapsulation 40 Preferably, the filter 53 is not only present on the walls 42. Each optical filter 53 can comprise a layer, two layers or more than two layers adapted to absorb and / or reflect the radiation emitted by the elementary light-emitting diodes . According to one embodiment, the optical filters 53 are transparent in the spectral range of emission of the phosphors associated with the display sub-pixel when they are present. Each optical filter 53 can comprise at least one colored polymer, photosensitive or not, or comprise a stack of dielectric layers forming a dichroic filter. Lenses may be provided on the encapsulation layer 40. For example, a lens may be provided for each sub-pixel or for sets of subpixels. According to one embodiment, the optoelectronic device 10 is at least partly produced according to the method described in patent application FR13 / 59413. An embodiment of a method for manufacturing the optoelectronic device 10 can comprise the following steps: (1) Etching, for each electrical insulation element 18, of an opening in the substrate 12 on the side of the front face 16. The opening can be formed by an etching of the reactive ion etching type, for example a DRIE etching . The depth of the opening is strictly greater than the thickness B15067 aimed at the substrate 12 after a thinning step described below. By way of example, the depth of the opening is between 10 μm and 200 μm, for example approximately 35 μm or 60 μm. (2) Formation of an insulating layer, for example made of silicon oxide, on the side walls of the opening, for example by a thermal oxidation process. The thickness of the insulating layer can be between 100 nm and 3000 nm, for example around 200 nm. (3) Filling the opening with a filling material, for example polycrystalline silicon, tungsten or a refractory metallic material compatible with the stages of the manufacturing process carried out at high temperatures, deposited for example by chemical vapor deposition at low pressure (LPCVD, English acronym for Low Pressure Chemical Vapor Deposition). Polycrystalline silicon advantageously has a coefficient of thermal expansion close to silicon and thus makes it possible to reduce the mechanical stresses during the stages of the manufacturing process carried out at high temperatures. (4) Chemical mechanical polishing (CMP) to find the silicon surface and eliminate any relief. (5) Formation of the germination portions 24, of the wires 26, of the insulating layer 32 and of the shells 34, by growth by epitaxy, as described in the patent applications W02014 / 044960 and FR13 / 59413. (6) Formation of the electrode 36 over the entire structure, for example by conformal deposition of the chemical vapor deposition type (CVD, for Vapor Deposition), in particular atomic layer deposition (ALD for Atomic Layer Déposition), or physical vapor deposition (PVD), by sputtering, the deposition can be followed by an annealing step of the electrode. B15067 (7) Formation of the opening 39 through the insulating layer 32 and the electrode layer 36. When the opening 39 is only present through the insulating layer 32, it is made before the step of forming the electrode 36. (8) Formation of the conductive layer 38, for example by PVD on the entire structure obtained in step (7) and etching of this layer to expose the portion of the electrode layer 36 covering each wire 26. (9) Heat treatment of annealing of the contacts according to the stacking of the layer 38. (10) Wall formation 42. (11) Deposition of the encapsulation layer 40 on the entire structure obtained in step (10), for example by a spinning process, by a jet printing process, by a screen printing or by a sheet deposition process. When different phosphors can be provided according to the sets D of light-emitting diodes, a method of selective phosphor deposition consists in mixing the phosphor grains of a first color with photosensitive silicone resin, then after spreading over the whole of the substrate and light-emitting diodes, to fix phosphors on the desired sub-pixels by photolithography. The operation is repeated with a second phosphor and as many times as there are sub-pixels of different colors. Another method is to use inkjet type printing equipment with an “ink” composed of the silicon-luminophore mixture and of specific additives. By printing, from a map and the orientation and referencing of the sub-pixels, the phosphors are deposited in the required locations. (12) Bonding of a temporary or permanent handle and thinning of the substrate 12 until reaching the elements 18 for lateral insulation. (13) Formation of conductive pads 22. B15067 FIGS. 2A to 2C illustrate the structures obtained at successive stages of an embodiment of stage (10) of the manufacturing process described above in the case where the walls 42 are made of a partially transparent material in the spectral range including the emission spectrum of elementary light-emitting diodes and that of phosphors, when they are present. The process includes the following successive steps: (i) Conformal deposition on the structure obtained after step (9) of the manufacturing process described above of an electrically insulating passivation layer 45, for example a layer of SiON (FIG. 2A). (ii) Depositing a layer 46 of partially transparent resin in the spectral range including the emission spectrum of elementary light-emitting diodes and that of phosphors, when they are present. The minimum thickness of the layer 46 is equal to the height of the wires 26 and the maximum thickness of the layer 46 is for example around 60 μm. (iii) Formation, by photolithography stages, of openings in the layer 46 to delimit the walls 42. FIGS. 3A and 3B illustrate the structures obtained at successive stages of another embodiment of stage (10) of the manufacturing method described above in the case where each wall 42 comprises a core covered with a shell in one opaque or reflective material in the spectral range including the emission spectrum of elementary light-emitting diodes and that of phosphors, when they are present. The method comprises the steps (i), (ii) and (iii) described above to form the heart of the walls 42 with the difference that the material used to form the heart can be any, in particular a metallic or organic material. The method further comprises the following successive steps: (iv) Conformal deposition, for example by spray coating (in English spray coating) of a layer 47 of opaque resin or of a reflective layer on the whole of the B15067 structure obtained in step (iii). The thickness of the layer 47 can be between 0.02 μm and 2 μm, preferably between 0.05 μm and 0.3 μm (FIG. 3A). (v) Removal, for example by photolithography steps, of the portions of the layer 47 present on the light-emitting diodes to delimit portions 48 of opaque resin 48 at the walls 42 (FIG. 3B). FIGS. 4A to 4E illustrate the structures obtained in successive steps of another embodiment of step (10) of the manufacturing method described above in the case where each wall 42 is metallic. The method comprises the step (i) described above and further comprises the following successive steps: (a) Conformal deposition of a layer 49 promoting the deposition of a metallic material. The layer 49 may comprise a stack of a layer of titanium, for example having a thickness between 20 nm and 400 nm, and of a layer of copper, for example having a thickness between 100 nm and 2 μm (FIG. 4A ). (b) Depositing a layer 50 of resin and forming, by photolithography steps, openings 51 in the layer 50 at the desired locations of the walls (FIG. 4B). (c) deposition, for example electrochemical deposition, of a metallic material in the openings 51 of the layer 50 of resin to form the walls 42 (FIG. 4C), the metallic material resting on the layer 49. (d) Removal of the resin layer 50 (FIG. 4D). (e) Removal of the layer 49 promoting the deposition of a metallic material on the entire structure with the exception of the portions present under the walls 42 (FIG. 4E). FIGS. 5A to 5D illustrate the structures obtained at successive stages of another embodiment of stage (10) of the manufacturing method described above in the case where each wall 42 is metallic. The method includes step (i) B15067 described above and further comprises the following successive steps: (a) “Depositing a layer 50 of resin and forming, by photolithography steps, openings 51 in the layer 50 at the desired locations of the walls 42 (FIG. 5A). (b) 'Engraving of the portions of the insulating layer 45 at the bottom of the openings 51 (Figure 5B). (c) 'Deposition, for example electrochemical deposition, of a metallic material in the openings 51 of the layer 50 of resin to form the walls 42 (FIG. 5C), the metallic material being in contact with the metallic layer 38. (d) 'Removal of the resin layer 50 (Figure 5D). FIG. 7 represents another embodiment of an optoelectronic device 55 comprising all the elements of the optoelectronic device 10 with the difference that the walls 42 correspond to openings 56 filled with air provided in the encapsulation layer 40. The openings 56 can have the same dimensions as those described above for the walls 42. The luminance of the optoelectronic device 55, in particular along a direction of observation perpendicular to the upper face 16 of the substrate 12, can be greater than that of the optoelectronic device 10 . FIG. 8 represents another embodiment of an optoelectronic device 57 comprising all the elements of the optoelectronic device 10 with the difference that, for at least some of the walls 42, and preferably of each wall 42, the solid block 43 has a height strictly less than the thickness of the encapsulation layer 40 and is extended by an opening 58 filled with air over the rest of the thickness of the encapsulation layer 40. According to one embodiment, the walls 42 have different heights. According to one embodiment, the height of the walls located between two Pix display sub-pixels associated with the same display pixel may be less than the height of the walls separating two Pix display sub-pixels associated with two B15067 different display pixels. According to one embodiment, the display sub-pixels corresponding to the same color can be arranged in strips and the height of the walls situated between two Pix display sub-pixels associated with the same strip can be less than the height of the walls separating two Pix display sub-pixels associated with two different bands. FIG. 9 represents another embodiment of an optoelectronic device 60 comprising all of the elements of the optoelectronic device 10 with the difference that certain walls designated by the reference 42 ', for example the walls at the periphery of the optoelectronic device 60 have a height greater than the thickness of the encapsulation layer 40. The optoelectronic device 60 further comprises a plate 62 of a substantially transparent material, for example a glass plate, resting on the ends of the walls 42 '. A film 64 of air or partial vacuum, for example at a pressure of less than 100 mbar (10,000 Pa), is present between the transparent plate 62 and the encapsulation layer 40. The height of the walls 42 ′ can be between 10 pm and 100 pm. The width of the walls 42 ′ can be between 0.5 μm and 200 μm. An advantage of the optoelectronic device 60 is that the plate 62 serves as a protective cover for the encapsulation layer 40. In particular, in the case where the encapsulation layer 40 contains phosphors, the plate 62 makes it possible to protect the phosphors. In addition, the air or vacuum film 64 may correspond to a substantially sealed volume, so that the risks of oxidation of the walls 42 which are not on the periphery of the optoelectronic device are reduced. The presence of the air or vacuum film 64 makes it possible to increase the extraction of light from the optoelectronic device 60 compared to the case where the transparent plate 62 would rest directly in contact with the encapsulation layer 40. As as a variant, the height of the walls 42 can be greater than the thickness of the encapsulation layer 40 and the walls 42 can also be in contact with the plate 62. B15067 FIG. 10 illustrates a step of an embodiment of a method for manufacturing the optoelectronic device 60. In this embodiment, the steps (1) to (10) described above can be implemented. The method comprises, independently of these steps, the formation of the walls 42 'on the plate 62, for example in a manner analogous to the formation of the walls 42. As a variant, the walls 42' can be formed by etching a layer silicon of a SOI type substrate (English acronym for Silicon On Insulator), the plate 62 can then correspond to the insulating layer of the SOI substrate. The encapsulation layer 40 can be deposited on the wires 26 and crosslinked and openings are formed in the encapsulation layer 40 to allow the passage of the walls 42 '. The walls 42 ′ are then introduced into the openings provided in the encapsulation layer 40 and fixed to the metal layer 38, for example by anodic bonding. As a variant, the encapsulation layer 40 can be deposited on the wires 26 and, before the crosslinking of the encapsulation layer 40, the walls 42 ′ are brought closer to the metal layer 38 through the encapsulation layer 40. The encapsulation layer 40 is then crosslinked. According to this variant, the encapsulation layer 40 may be present between each wall 42 'and the metal layer 38. Another embodiment of the optoelectronic device 60 is to manufacture the walls 42 ′ at the same time as the walls 42, in particular as has been described previously in relation to FIGS. 4A to 4E and 5A to 5D and then to stick the plate 62 to the walls 42 ′. FIG. 11 represents another embodiment of an optoelectronic device 65 comprising all of the elements of the optoelectronic device 60 shown in FIG. 9 and further comprising optical filters 66 provided on the plate 62. The optical filters 66 can have the same structure as the optical filters 53 described above. Elements 67 opaque in the spectral range including the emission spectrum of elementary light emitting diodes and that of luminophores, B15067 when present, can be provided between some of the filters 66. FIG. 12 represents another embodiment of an optoelectronic device 68 comprising all the elements of the optoelectronic device 60 represented in FIG. 9 and comprising, in addition, on the encapsulation layer 40 the optical filters 53 described previously in relation with figure 6. FIG. 13 represents another embodiment of an optoelectronic device 69 comprising all the elements of the optoelectronic device 60 represented in FIG. 9 with the difference that at least some of the walls 42 have the structure of the optoelectronic device 55, it that is to say each comprising the block 43 having a height less than the thickness of the encapsulation layer 40 and extending through the opening 58 filled with air or vacuum. As a variant, the walls 42 may correspond to openings filled with air or vacuum, as for the optoelectronic device 55 shown in FIG. 7. FIG. 14 shows another embodiment of an optoelectronic device 70 comprising all the elements of the optoelectronic device 60 shown in FIG. 9 with the difference that the walls 42 and 42 ′ are not present and that the film of air or vacuum 64 is replaced by a layer 72 containing phosphors interposed between the substantially transparent plate 62 and the encapsulation layer 40, the phosphor layer 72 being in contact with the plate 62 and the encapsulation layer 40. L the thickness of the phosphor layer 72 can be between 0.2 μm and 50 μm and preferably between 1 μm and 30 μm. Walls 74 extend into the phosphor layer 72 and divide the layer 72 into portions 76 containing phosphors. The walls 74 can have the same structure and the same composition as those described above for the walls 42. According to one embodiment, the walls 74 or the walls of the walls are opaque in the spectral range including the emission spectrum of light emitting diodes B15067 elementary and that of the phosphors, when present. According to one embodiment, each wall 74 comprises reflective walls. Different phosphors can be provided in different portions 76. In the present embodiment, the phosphors are provided at the portions 76 and are not present in the encapsulation layer 40. This advantageously allows the use of phosphors which would be too large to be inserted between the wires 26. In the present embodiment, the function of improving the contrast and the luminance is fulfilled by the walls 74 provided in the phosphor layer 72. However, the embodiments described in the present description in which walls are present between the sets of light emitting diodes can favorable for the improvement of contrast. The represents another mode of optoelectronics 80 comprising the realization of a being plus figure 15 device all the elements of the optoelectronic device 70 represented in figure 14 with the difference that the encapsulation layer 40 is not present and that the layer 72 of phosphors rests directly on the tops of the wires 26. FIG. 16 represents another embodiment of an optoelectronic device 85 comprising all of the elements of the optoelectronic device 70 shown in FIG. 14 and further comprises the walls 42 in the encapsulation layer 40 as for the optoelectronic device 10. In the present embodiment, the height of the walls 42 is substantially equal to the thickness of the encapsulation layer 40. Preferably, the walls 42 are in the extension of the walls 74. The presence of the walls 42 and 74 makes it possible to 'Obtain an increase in contrast and luminance compared to optoelectronic devices 70 and 80. As a variant, the walls 42 can be replaced by openings filled with air or vacuum as for the optoelectronic device 55 described previously in relation with FIG. 7. As a variant, the height of the walls 42 can B15067 be less than the thickness of the encapsulation layer 40 and air-filled openings can be provided in the extension of the walls as for the optoelectronic device 57 described previously in relation to FIG. 8. According to another embodiment, the walls 42 and 74 of the optoelectronic device 85 are in one piece and are formed as described above for the walls 42 ′ in relation to FIG. 10. Alternatively, the optoelectronic device 70, 80 or 85 may further include optical filters. Each optical filter is interposed between the plate 62 and one of the portions 76 containing phosphors. The optical filters can be manufactured before the walls 74 and the portions 76 containing phosphors are formed. FIG. 17 shows another embodiment of an optoelectronic device 90 comprising all the elements of the optoelectronic device 70 shown in FIG. 14 with the difference that the substantially transparent plate 62 is not present. By way of example, the walls 74 are part of a metal grid delimiting boxes in which the portions 76 containing the phosphors are housed. FIG. 18 represents another embodiment of an optoelectronic device 95 comprising all the elements of the optoelectronic device 90 shown in FIG. 17 with the difference that the encapsulation layer 40 is not present as for the optoelectronic device 80 and that the layer 72 of phosphors rests directly on the tops of the wires 26. FIG. 19 represents another embodiment of an optoelectronic device 100 comprising all of the elements of the optoelectronic device 90 shown in FIG. 17 and further comprises the walls 42 in the encapsulation layer 40 as for the optoelectronic device 85. FIG. 20 represents another embodiment of an optoelectronic device 105 comprising all of the B15067 elements of the optoelectronic device 70 represented in FIG. 14 with the difference that the plate 62 and the phosphor layer 72 are replaced by a monocrystalline layer 106 of a photoluminescent material fixed to the encapsulation layer 40 by means of a layer 108 of a bonding material, for example a layer of silicone. The photoluminescent material may correspond to one of the photoluminescent materials described above for the optoelectronic device 10. The photoluminescent layer 106 comprises openings 110 which extend over part of the thickness of the layer 106 but do not pass through all of layer 106. The openings 110 open on the side of the encapsulation layer 40. The openings 110 are preferably located in the extension of the walls 42 and delimit photoluminescent portions 112 in the layer 106, each photoluminescent portion 112 being located at vis-à-vis one of the sets D of light-emitting diodes. The openings 110 may be partially or entirely filled with air or vacuum or be partially or entirely filled with a material which is a good thermal conductor, for example metal or a metal alloy. The photoluminescent layer 112 can comprise a texturing on its face 114 visible by an observer, that is to say reliefs 116 which increase the extraction of light by the face 114. The openings 110 can be produced by sawing. FIG. 21 represents another embodiment of an optoelectronic device 115 comprising all the elements of the optoelectronic device 105 represented in FIG. 20 with the difference that the encapsulation layer 40 is not present as for the optoelectronic device 80 and that the photoluminescent layer 112 rests directly on the tops of the wires 26 by means of the adhesive layer 108. FIG. 22 represents another embodiment of an optoelectronic device 120 comprising all the elements of the optoelectronic device 105 shown in FIG. B15067 and further includes the walls 42 in the encapsulation layer 40 as for the optoelectronic device 85. FIG. 23 represents another embodiment of an optoelectronic device 125 comprising all of the elements of the optoelectronic device 10 shown in FIG. 1B with the difference that each set D of light-emitting diodes is formed in the bottom of a bowl 126 which extends into the substrate 12 from the face 16 and that the walls 42 correspond to portions 128 of the substrate 12 which delimit the bowl 126. The walls 128 extend in particular between the sets D of light-emitting diodes of each pair of sets D adjacent. The portions 128 of the substrate 12 forming the walls are electrically isolated from the adjacent portions of the substrate 12 by the electrical insulation trenches 18. The depth of each bowl 126 is between 2 μm and 100 μm, for example approximately 25 μm. The insulating layer 32 covers the walls of each bowl 126 and all of the walls 128. For each set of light-emitting diodes D, the electrode layer 36 extends over the wires 26 and on the bottom of the bowl 125 in which is formed the set D of light emitting diodes and the conductive layer 38 extends over the electrode layer 36 between the wires 26. In the present embodiment, the electrode layer 36 and the conductive layer 38 do not extend over the walls 128. The electrical connection between the electrode layers 36 and / or 38 of two sets D of diodes adjacent light emitting is produced through the wall 128 separating the two sets D. For this purpose, for each display sub-pixel Pix, the electrode layer 36 and / or 38 is in contact with the portion of substrate 128 by means of an opening 129 provided in the insulating layer 32. The electrode layers 36 and / or 38 of all the sets D of light-emitting diodes are therefore electrically connected. In the present embodiment, the trenches 18 are located in the substrate 14 at the level of each bowl 126 and separate the portions 20 of the substrate 14 from the portions 130 B15067 of the substrate 14 containing the walls 128. The electrode layers 36 and / or 38 are electrically connected to the portions 130. In addition, a conductive portion 132 can be provided on the face 14 in contact with one of the portions 130 of substrate forming a wall electrically connected to the electrode layers 36 in order to allow the polarization of the electrode layers 36. FIG. 24 represents another embodiment of an optoelectronic device 135 comprising all the elements of the optoelectronic device 120 shown in Figure 23 with the difference that the electrode layer 36 and / or 38 extends over all the wires 2 6 and on the walls 128 and is common to all the sets D of light emitting diodes. In this case, the layer 32 is not open at the bottom of the bowl 126 but be open at the top of at least some of the walls 128 delimiting the bowls 126. For this purpose, the electrode layer 36 and / or 38 is in contact at the top of at least some of the walls 128 via openings 129 provided in the insulating layer 32. FIG. 25 represents another embodiment of an optoelectronic device 140 comprising all the elements of the optoelectronic device 135 represented in FIG. 24 with the difference that the trenches 18 are present in the substrate 14 at the level of the walls 128. In the embodiment shown in FIGS. 23, 24 and 25, the lateral flanks of the walls 128 are substantially perpendicular to the faces 14 and 16 of the substrate 12. As a variant, the lateral flanks of the walls 128 can be inclined relative to the faces 14 and 16 of an angle different from 90 ° and oriented so as to reflect the light rays emitted by the elementary light-emitting diodes, and the phosphors when they are present, towards the outside of the optoelectronic device 125. FIGS. 26A to 26D illustrate the structures obtained at successive stages of an embodiment of the optoelectronic device 125. B15067 FIG. 26A represents the structure obtained after the implementation of steps (1), (2), (3) and (4) described above which lead to the formation, in the substrate 12 not yet thinned, of the isolation trenches electric 18. FIG. 26B represents the structure obtained after the formation of the cuvettes 126 in the face 16 of the substrate 12. FIG. 26C represents the structure obtained after the implementation of step (5) described above which leads to the formation, in each cuvette 126, of a set D of light-emitting diodes and to the formation of the insulating layer 32 in the basins 126 and on the walls 128. The openings 129 were then formed in the insulating layer 32 and the step (6) described above was implemented to form the electrode layer 36. According to the process used , the electrode layer 36 can also be deposited on the walls 128. A step of removing the portions of the electrode layer present on the walls 128 can then be provided. The step (8) described above was then implemented to form the conductive layer 38 in each bowl 126 between the wires 26. FIG. 26D represents the structure obtained after the implementation of step (9) described above of thermal annealing, of step (11) described above of depositing an encapsulation layer in the bowls 126 and on the walls 128 followed by an etching or planarization step to obtain encapsulation layers 40 only in the bowls 126 and the step (12) described above of thinning the substrate 12 until reaching the elements 18 of lateral insulation. The method further comprises the step (13) described above of forming the conductive pads 22. In the embodiments described above, the optoelectronic device 10 is fixed to another circuit by fusible conductive elements, not shown, for example solder balls or indium balls fixed to the conductive pads 22. The assembly of the device optoelectronics 10 on another circuit, in particular on a control circuit, is B15067 made by conventional matrix hybridization techniques, by means of fusible balls or by comparison of fusible materials, for example in indium, or in SnAg, or of copper columns or of gold studs (Stud Bump technology ) or by conductive molecular bonding (copper on copper). The metal stack forming the conductive pads 22 is chosen so as to be compatible with the assembly technology chosen. By way of example, the conductive pads 22 can be made of Cu or Ti-Ni-Au, Sn-Ag or Ni-Pd-Au. The active layer of the shell 34 of the elementary light-emitting diodes of at least one of the sets of light-emitting diodes D can be produced in a different manner from the active layer of the shell of the elementary light-emitting diodes of at least one other set of diodes electroluminescent. For example, the active layer of the shell 34 of a first set can be adapted to emit light at a first wavelength, for example blue light and the active layer of the shell 34 of a second set can be adapted to emit light at a second wavelength different from the first wavelength, for example green light. This can be obtained, for example, by adapting the pitch and size of the wires in each set, which has the consequence of modifying the thickness and the composition of the quantum wells making up these active layers. In addition, a third assembly can be adapted to emit light at a third wavelength different from the first and second wavelengths, for example red light. Thus, the composition of the blue, green, and red lights can be chosen so that an observer perceives white light by color composition, each diode, or set of diodes, emitting at a first, second and third wavelength can be addressed independently of the others in order to adjust the color. In the embodiment described above, the insulating layer 32 covers the entire periphery of the portion B15067 lower 28 of each wire 26. Alternatively, part of the lower portion 28, or even the entire lower portion 28, may not be covered by the insulating layer 32. In this case, the shell 34 can cover each wire 26 over a height greater than the height of the upper portion 30, or even over the entire height of the wire 26. In addition, in the embodiment described above, the insulating layer 32 does not cover the periphery of the upper portion 30 of each wire 26. Alternatively, the insulating layer 32 can cover a portion of the upper portion 30 of each wire 26. In addition, according to another variant, the insulating layer 32 may, for each wire 26, partially cover the lower portion of the shell 34. According to another embodiment, the layer 32 may not be present, in particular in the case where the qermination pads 24 are replaced by a qermination layer covered with a dielectric layer and that the wires are formed on the qermination layer in openings provided in the dielectric layer. The optoelectronic device 10 can be attached to another integrated circuit, in particular a control circuit, comprising electronic components, in particular transistors, used for controlling the sets of light-emitting diodes of the optoelectronic device 10. In operation, the conductive pads 22 electrically connected to the conductive layer 38 can be connected to a source of a first reference potential. The conductive pad 22 in contact with the portion 20 of the substrate 12 on which the elementary light-emitting diodes of a set D of light-emitting diodes to be activated rest can be connected to a source of a second reference potential so as to circulate a current through the elementary light-emitting diodes of the set D considered. Each conductive pad 22 can extend over a large part of the associated portion 20, a homogeneous distribution of the current can be obtained. B15067 In Figures IA to IC, the conductive layer 38 is shown in contact with portions 20 along one side of the optoelectronic device 10. Alternatively, the conductive layer 38 may be in contact with portions 20 throughout periphery of the optoelectronic device 10. In the embodiments represented in FIGS. 1A to 1C, the optoelectronic device 10 is electrically connected to an external circuit by means of fusible materials provided on the side of the underside 14 of the substrate 12. However, other modes of electrical connection can be considered. In the embodiments described above, the substrate 12 is a substrate made of a semiconductor or conductive material. According to another embodiment, the substrate 12 is wholly or partly made of an insulating material, for example made of silicon dioxide (S1O2) or sapphire. The electrical connection between the conductive pads 22 and the conductive layer 38 or the germination pads 24 can be achieved by using conductive elements passing through the substrate 12 over its entire thickness, for example through vias or TSV (English acronym for Through Silicon Via). According to another embodiment, at least one conductive pad is provided in contact with the conductive layer 38 on the side of the front face 16. The encapsulation layer 40 then comprises an opening which exposes the conductive pad. Neither the conductive layer 38 nor the electrode layer 36 are in electrical contact with the semiconductor substrate 12. The conductive pad is electrically connected to an external circuit, not shown, by a wire not shown. Several conductive pads can be distributed over the conductive layer 38, for example at the periphery of the optoelectronic device. Various embodiments with various variants have been described above. It is noted that a person skilled in the art can combine various elements of these various embodiments and variants without demonstrating inventive step. For example, the B15067 structure of the optoelectronic device 120 shown in FIG. 22 can be implemented with the structure of the optoelectronic device 55 shown in FIG. 7 or the structure of the optoelectronic device 57 shown in FIG. 8. B15067
权利要求:
Claims (34) [1" id="c-fr-0001] 1. Optoelectronic device (10) comprising a substrate (12) comprising first and second opposite faces (14, 16), elements (18) of lateral electrical insulation extending from the first face (16) to the second face (14) and delimiting in the substrate first semiconductor or conductive portions (20) electrically isolated from each other, the optoelectronic device further comprising, for each first portion, a set (D) of light emitting diodes resting on the first face and electrically connected to the first portion, the optoelectronic device further comprising an electrode layer (36) which is conductive and at least partially transparent at least in the emission wavelength range of the light emitting diodes covering all the diodes electroluminescent, a protective layer (40; 72; 106) containing a first dielectric material and at least partially transparent at least in the emission wavelength range of the light emitting diodes and of possible phosphors present in the protective layer, and of the walls (42; 74; 110; 128) extending at least in part in the protective layer and delimiting in the protective layer the second portions surrounding or facing the assemblies (D) of light-emitting diodes, the walls containing at least one second different material of the first material and included in the group comprising air, a metal, a semiconductor material, a metal alloy, a material which is partially transparent at least in the emission wavelength range of light-emitting diodes and possible phosphors and a core made of a material at least partially transparent at least in the emission wavelength range of light-emitting diodes and any phosphors covered with an opaque or reflecting layer at least in the emission wavelength range of light-emitting diodes and any phosphors. B15067 [2" id="c-fr-0002] 2. Optoelectronic device according to claim 1, in which each light-emitting diode comprises at least one semiconductor element (26) wired, conical or frustoconical, integrating or covered at the top and / or at least on part of its lateral faces by a shell ( 34) comprising at least one active layer adapted to supply the majority of the radiation from the light-emitting diode. [3" id="c-fr-0003] 3. Optoelectronic device according to any one of claims 1 or 2, in which the protective layer (40) surrounds each light-emitting diode. [4" id="c-fr-0004] 4. Optoelectronic device according to any one of claims 1 to 3, in which the walls (42; 74) extend at least over the entire thickness of the protective layer (40; 72). [5" id="c-fr-0005] 5. Optoelectronic device according to any one of claims 1 to 4, in which at least one of the walls (42) comprises a solid block (43) extending by an opening (58) filled with air. [6" id="c-fr-0006] 6. Optoelectronic device according to any one of claims 1 to 5, in which the protective layer (40) comprises phosphors. [7" id="c-fr-0007] 7. Optoelectronic device according to any one of claims 1 to 5, in which the protective layer (40) comprises a monocrystalline crystal of a phosphor. [8" id="c-fr-0008] 8. Optoelectronic device according to any one of claims 1 to 7, further comprising a plate (62) of a material at least partially transparent at least in the emission wavelength range of light emitting diodes and any phosphors, covering the protective layer (40) and mechanically connected to the substrate (12). [9" id="c-fr-0009] 9. Optoelectronic device according to claim 8, in which the plate (62) is separated from the protective layer (40) by an air or partial vacuum film. B15067 [10" id="c-fr-0010] 10. Optoelectronic device according to claim 8 or 9, further comprising additional walls (42 ') whose height is greater than the thickness of the protective layer (40) in contact with the plate (62) and resting on the substrate (12). [11" id="c-fr-0011] 11. Optoelectronic device according to any one of claims 1 to 10, further comprising a conductive layer (38) covering the electrode layer (36) around the light-emitting diodes of each assembly. [12" id="c-fr-0012] 12. Optoelectronic device according to any one of claims 1 to 11, in which the substrate (12) is made of silicon, germanium, silicon carbide, a compound IIIV, such as GaN or GaAs, or ZnO . [13" id="c-fr-0013] 13. Optoelectronic device according to any one of claims 1 to 12, in which each semiconductor element (26) is mainly made of a III-V compound, in particular gallium nitride, or of a II-VI compound. [14" id="c-fr-0014] 14. Optoelectronic device according to any one of claims 1 to 13, in which the optoelectronic device is a display screen or a projection device. [15" id="c-fr-0015] 15. Optoelectronic device according to any one of claims 1 to 14, further comprising on the protective layer (40) filters (53) adapted to absorb and / or at least partially reflect the radiation emitted by the diodes electroluminescent. [16" id="c-fr-0016] 16. Optoelectronic device according to claim 8, further comprising, on the plate (62) filters (66) adapted to absorb and / or reflect at least in part the radiation emitted by the light-emitting diodes. [17" id="c-fr-0017] 17. Optoelectronic device according to any one of claims 1 to 16, in which the walls (128) correspond to portions of the substrate (12). [18" id="c-fr-0018] 18. Method for manufacturing an optoelectronic device (10) comprising the following steps: B15067 a) forming, in a substrate (12) comprising first and second opposite faces (14, 16), elements (18) of lateral electrical insulation extending from the first face (16) to the second face (14) and delimiting in the substrate first semiconductor or conductive portions (20) electrically isolated from each other; b) forming, for each first portion, a set (D) of light-emitting diodes resting on the first face and electrically connected to the first portion; c) forming, for each first portion, an electrode layer (36) which is conductive and at least partially transparent at least in the emission wavelength range of the light-emitting diodes covering all the light-emitting diodes; d) forming a protective layer (40; 72; 106) of a first dielectric and at least partially transparent material at least in the emission wavelength range of the light-emitting diodes and of possible phosphors present in the layer protection and walls (42; 74; 110; 128) extending at least in part in the protection layer and delimiting in the protection layer the second portions surrounding or opposite the assemblies (D) of light-emitting diodes, the walls containing at least one second material different from the first material and included in the group comprising air, a metal, a metal alloy, a partially transparent material at least in the emission wavelength range of light-emitting diodes and any phosphors and a core of at least partially transparent material at least in the emission wavelength range of light-emitting diodes and ev whole phosphors covered with an opaque or reflective layer at least in the emission wavelength range of light-emitting diodes and possible phosphors. [19" id="c-fr-0019] 19. The method of claim 18, wherein each light emitting diode comprises at least one element B15067 semiconductor (26) wired, conical or frustoconical, integrating or covered at the top and / or at least on part of its lateral faces by a shell (34) comprising at least one active layer adapted to supply the majority of the radiation from the diode electroluminescent. [20" id="c-fr-0020] 20. Method according to any one of claims 18 or 19, in which the protective layer (40) surrounds each light-emitting diode. [21" id="c-fr-0021] 21. Method according to any one of claims 18 to 20, in which the walls (42; 74) extend at least over the entire thickness of the protective layer (40; 72). [22" id="c-fr-0022] 22. Method according to any one of claims 18 to 21, in which at least one of the walls (42) comprises a solid block (43) extending by an opening (58) filled with air. [23" id="c-fr-0023] 23. Method according to any one of claims 18 to 22, in which the protective layer (40) comprises phosphors. [24" id="c-fr-0024] 24. Method according to any one of claims 18 to 23, in which the protective layer (40) comprises a monocrystalline crystal of a phosphor. [25" id="c-fr-0025] 25. A method according to any one of claims 18 to 24, further comprising the mechanical connection to the substrate (12) of a plate (62) of a material at least partially transparent at least in the range of length emission wave of the light-emitting diodes and any phosphors and covering the protective layer (40). [26" id="c-fr-0026] 26. The method of claim 25, wherein the plate (62) is separated from the protective layer (40) by a film of air or partial vacuum. [27" id="c-fr-0027] 27. The method of claim 25 or 26, further comprising the formation of additional walls (42 ') whose height is greater than the thickness of the protective layer (40) in contact with the plate (62) and resting on the substrate (12). B15067 [28" id="c-fr-0028] 28. The method according to any one of claims 18 to 27, further comprising the formation of a conductive layer (38) covering the electrode layer (36) around the light-emitting diodes of each assembly. 5 [29" id="c-fr-0029] 29. Method according to any one of claims 18 to 28, in which the substrate (12) is made of silicon, germanium, silicon carbide, a III-V compound, such as GaN or GaAs, or ZnO. [30" id="c-fr-0030] 30. Method according to any one of claims 18 10 to 29, in which each semiconductor element (26) is predominantly made of a III-V compound, in particular gallium nitride, or of a II-VI compound. [31" id="c-fr-0031] 31. Method according to any one of claims 18 to 30, in which the optoelectronic device is a screen 15 display or a projection device. [32" id="c-fr-0032] 32. Method according to any one of claims 18 to 31, further comprising the formation on the protective layer (40) of filters (53) adapted to absorb and / or reflect at least partially the radiation emitted by the diodes 2 0 electroluminescent. [33" id="c-fr-0033] 33. The method of claim 25, further comprising forming on the plate (62) filters (66) adapted to absorb and / or reflect at least partially the radiation emitted by the light emitting diodes. [34" id="c-fr-0034] 34. Method according to any one of claims 18 to 33, in which the walls (128) correspond to portions of the substrate (12). B15067 1/11 B15067 2/11 Pix χ, X T D. 26/30 26 H 20 22 18 24 20 22 18 Pix 44 i __--- j. Seen j 26 26 26 42 C.D 26> θ „26 V 20 22 18 24 44 x L 20 22 18 Pix 2420 26 22 Pix 18 14 26 26 26 42 Ύ D 26 30 ~ 26 H 20 22 18 24 20 22 18 2420 26 22 18 14 '
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公开号 | 公开日 JP2019526925A|2019-09-19| CN109690781A|2019-04-26| US20190165040A1|2019-05-30| WO2018002485A1|2018-01-04| US10923528B2|2021-02-16| EP3479408A1|2019-05-08| EP3479408B1|2020-08-05| KR20190023094A|2019-03-07| FR3053530B1|2018-07-27|
引用文献:
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法律状态:
2017-06-16| PLFP| Fee payment|Year of fee payment: 2 | 2018-01-05| PLSC| Publication of the preliminary search report|Effective date: 20180105 | 2018-06-14| PLFP| Fee payment|Year of fee payment: 3 | 2020-06-29| PLFP| Fee payment|Year of fee payment: 5 |
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申请号 | 申请日 | 专利标题 FR1656170|2016-06-30| FR1656170A|FR3053530B1|2016-06-30|2016-06-30|PIXEL OPTOELECTRONIC DEVICE WITH IMPROVED CONTRAST AND LUMINANCE|FR1656170A| FR3053530B1|2016-06-30|2016-06-30|PIXEL OPTOELECTRONIC DEVICE WITH IMPROVED CONTRAST AND LUMINANCE| CN201780053399.1A| CN109690781A|2016-06-30|2017-06-22|Including the photoelectric device with improved contrast and the pixel of brightness| PCT/FR2017/051671| WO2018002485A1|2016-06-30|2017-06-22|Optoelectronic device comprising pixels with improved contrast and brightness| EP17740058.7A| EP3479408B1|2016-06-30|2017-06-22|Optoelectronic device with pixels of improved contrast and brightness| US16/313,005| US10923528B2|2016-06-30|2017-06-22|Optoelectronic device comprising pixels with improved contrast and brightness| KR1020197002459A| KR20190023094A|2016-06-30|2017-06-22|An optoelectronic device having pixels with enhanced contrast and brightness| JP2018568196A| JP2019526925A|2016-06-30|2017-06-22|Optoelectronic device having pixels with enhanced contrast and brightness| 相关专利
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